__init__.py 36 KB

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  1. # python-cc1101 - Python Library to Transmit RF Signals via CC1101 Transceivers
  2. #
  3. # Copyright (C) 2020 Fabian Peter Hammerle <fabian@hammerle.me>
  4. #
  5. # This program is free software: you can redistribute it and/or modify
  6. # it under the terms of the GNU General Public License as published by
  7. # the Free Software Foundation, either version 3 of the License, or
  8. # any later version.
  9. #
  10. # This program is distributed in the hope that it will be useful,
  11. # but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. # GNU General Public License for more details.
  14. #
  15. # You should have received a copy of the GNU General Public License
  16. # along with this program. If not, see <https://www.gnu.org/licenses/>.
  17. import contextlib
  18. import enum
  19. import fcntl
  20. import logging
  21. import math
  22. import typing
  23. import warnings
  24. import spidev
  25. from cc1101.addresses import (
  26. StrobeAddress,
  27. ConfigurationRegisterAddress,
  28. StatusRegisterAddress,
  29. PatableAddress,
  30. FIFORegisterAddress,
  31. )
  32. from cc1101.options import PacketLengthMode, SyncMode, ModulationFormat
  33. _LOGGER = logging.getLogger(__name__)
  34. class Pin(enum.Enum):
  35. GDO0 = "GDO0"
  36. class _TransceiveMode(enum.IntEnum):
  37. """
  38. PKTCTRL0.PKT_FORMAT
  39. """
  40. FIFO = 0b00
  41. SYNCHRONOUS_SERIAL = 0b01
  42. RANDOM_TRANSMISSION = 0b10
  43. ASYNCHRONOUS_SERIAL = 0b11
  44. class MainRadioControlStateMachineState(enum.IntEnum):
  45. """
  46. MARCSTATE - Main Radio Control State Machine State
  47. """
  48. # see "Figure 13: Simplified State Diagram"
  49. # and "Figure 25: Complete Radio Control State Diagram"
  50. IDLE = 0x01
  51. STARTCAL = 0x08 # after IDLE
  52. BWBOOST = 0x09 # after STARTCAL
  53. FS_LOCK = 0x0A
  54. RX = 0x0D
  55. RXFIFO_OVERFLOW = 0x11
  56. TX = 0x13
  57. # TXFIFO_UNDERFLOW = 0x16
  58. class _ReceivedPacket: # unstable
  59. # "Table 31: Typical RSSI_offset Values"
  60. _RSSI_OFFSET_dB = 74
  61. def __init__(
  62. self,
  63. # *,
  64. payload: bytes,
  65. rssi_index: int, # byte
  66. checksum_valid: bool,
  67. link_quality_indicator: int, # 7bit
  68. ):
  69. self.payload = payload
  70. self._rssi_index = rssi_index
  71. assert 0 <= rssi_index < (1 << 8), rssi_index
  72. self.checksum_valid = checksum_valid
  73. self.link_quality_indicator = link_quality_indicator
  74. assert 0 <= link_quality_indicator < (1 << 7), link_quality_indicator
  75. @property
  76. def rssi_dbm(self) -> float:
  77. """
  78. Estimated Received Signal Strength Indicator (RSSI) in dBm
  79. see section "17.3 RSSI"
  80. """
  81. if self._rssi_index >= 128:
  82. return (self._rssi_index - 256) / 2 - self._RSSI_OFFSET_dB
  83. return self._rssi_index / 2 - self._RSSI_OFFSET_dB
  84. def __str__(self) -> str:
  85. return "{}(RSSI {:.0f}dBm, 0x{})".format(
  86. type(self).__name__,
  87. self.rssi_dbm,
  88. "".join("{:02x}".format(b) for b in self.payload),
  89. )
  90. class CC1101:
  91. # pylint: disable=too-many-public-methods
  92. # > All transfers on the SPI interface are done
  93. # > most significant bit first.
  94. # > All transactions on the SPI interface start with
  95. # > a header byte containing a R/W bit, a access bit (B),
  96. # > and a 6-bit address (A5 - A0).
  97. # > [...]
  98. # > Table 45: SPI Address Space
  99. _WRITE_SINGLE_BYTE = 0x00
  100. # > Registers with consecutive addresses can be
  101. # > accessed in an efficient way by setting the
  102. # > burst bit (B) in the header byte. The address
  103. # > bits (A5 - A0) set the start address in an
  104. # > internal address counter. This counter is
  105. # > incremented by one each new byte [...]
  106. _WRITE_BURST = 0x40
  107. _READ_SINGLE_BYTE = 0x80
  108. _READ_BURST = 0xC0
  109. # 29.3 Status Register Details
  110. _SUPPORTED_PARTNUM = 0
  111. # > The two versions of the chip will behave the same.
  112. # https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz/f/156/p/428028/1529544#1529544
  113. _SUPPORTED_VERSIONS = [
  114. 0x04, # https://github.com/fphammerle/python-cc1101/issues/15
  115. 0x14,
  116. ]
  117. _CRYSTAL_OSCILLATOR_FREQUENCY_HERTZ = 26e6
  118. # see "21 Frequency Programming"
  119. # > f_carrier = f_XOSC / 2**16 * (FREQ + CHAN * ((256 + CHANSPC_M) * 2**CHANSPC_E-2))
  120. _FREQUENCY_CONTROL_WORD_HERTZ_FACTOR = _CRYSTAL_OSCILLATOR_FREQUENCY_HERTZ / 2 ** 16
  121. # roughly estimated / tested with SDR receiver, docs specify:
  122. # > can [...] be programmed for operation at other frequencies
  123. # > in the 300-348 MHz, 387-464 MHz and 779-928 MHz bands.
  124. _TRANSMIT_MIN_FREQUENCY_HERTZ = 281.7e6
  125. # > The PATABLE is an 8-byte table that defines the PA control settings [...]
  126. _PATABLE_LENGTH_BYTES = 8
  127. def __init__(
  128. self, spi_bus: int = 0, spi_chip_select: int = 0, lock_spi_device: bool = False
  129. ) -> None:
  130. """
  131. lock_spi_device:
  132. When True, an advisory, exclusive lock will be set on the SPI device file
  133. non-blockingly via flock upon entering the context.
  134. If the SPI device file is already locked (e.g., by a different process),
  135. a BlockingIOError will be raised.
  136. The lock will be removed automatically, when leaving the context.
  137. The lock can optionally be released earlier by calling .unlock_spi_device().
  138. >>> transceiver = cc1101.CC1101(lock_spi_device=True)
  139. >>> # not locked
  140. >>> with transceiver:
  141. >>> # locked
  142. >>> # lock removed
  143. >>> with transceiver:
  144. >>> # locked
  145. >>> transceiver.unlock_spi_device()
  146. >>> # lock removed
  147. """
  148. self._spi = spidev.SpiDev()
  149. self._spi_bus = int(spi_bus)
  150. # > The BCM2835 core common to all Raspberry Pi devices has 3 SPI Controllers:
  151. # > SPI0, with two hardware chip selects, [...]
  152. # > SPI1, with three hardware chip selects, [...]
  153. # > SPI2, also with three hardware chip selects, is only usable on a Compute Module [...]
  154. # https://github.com/raspberrypi/documentation/blob/d41d69f8efa3667b1a8b01a669238b8bd113edc1/hardware/raspberrypi/spi/README.md#hardware
  155. # https://www.raspberrypi.org/documentation/hardware/raspberrypi/spi/README.md
  156. self._spi_chip_select = int(spi_chip_select)
  157. self._lock_spi_device = lock_spi_device
  158. @property
  159. def _spi_device_path(self) -> str:
  160. # https://github.com/doceme/py-spidev/blob/v3.4/spidev_module.c#L1286
  161. return "/dev/spidev{}.{}".format(self._spi_bus, self._spi_chip_select)
  162. @staticmethod
  163. def _log_chip_status_byte(chip_status: int) -> None:
  164. # see "10.1 Chip Status Byte" & "Table 23: Status Byte Summary"
  165. # > The command strobe registers are accessed by transferring
  166. # > a single header byte [...]. That is, only the R/W̄ bit,
  167. # > the burst access bit (set to 0), and the six address bits [...]
  168. # > The R/W̄ bit can be either one or zero and will determine how the
  169. # > FIFO_BYTES_AVAILABLE field in the status byte should be interpreted.
  170. _LOGGER.debug(
  171. "chip status byte: CHIP_RDYn=%d STATE=%s FIFO_BYTES_AVAILBLE=%d",
  172. chip_status >> 7,
  173. bin((chip_status >> 4) & 0b111),
  174. chip_status & 0b1111,
  175. )
  176. def _read_single_byte(
  177. self, register: typing.Union[ConfigurationRegisterAddress, FIFORegisterAddress]
  178. ) -> int:
  179. response = self._spi.xfer([register | self._READ_SINGLE_BYTE, 0])
  180. assert len(response) == 2, response
  181. self._log_chip_status_byte(response[0])
  182. return response[1]
  183. def _read_burst(
  184. self,
  185. start_register: typing.Union[
  186. ConfigurationRegisterAddress, PatableAddress, FIFORegisterAddress
  187. ],
  188. length: int,
  189. ) -> typing.List[int]:
  190. response = self._spi.xfer([start_register | self._READ_BURST] + [0] * length)
  191. assert len(response) == length + 1, response
  192. self._log_chip_status_byte(response[0])
  193. return response[1:]
  194. def _read_status_register(self, register: StatusRegisterAddress) -> int:
  195. # > For register addresses in the range 0x30-0x3D,
  196. # > the burst bit is used to select between
  197. # > status registers when burst bit is one, and
  198. # > between command strobes when burst bit is
  199. # > zero. [...]
  200. # > Because of this, burst access is not available
  201. # > for status registers and they must be accessed
  202. # > one at a time. The status registers can only be
  203. # > read.
  204. response = self._spi.xfer([register | self._READ_BURST, 0])
  205. assert len(response) == 2, response
  206. self._log_chip_status_byte(response[0])
  207. return response[1]
  208. def _command_strobe(self, register: StrobeAddress) -> None:
  209. # see "10.4 Command Strobes"
  210. _LOGGER.debug("sending command strobe 0x%02x", register)
  211. response = self._spi.xfer([register | self._WRITE_SINGLE_BYTE])
  212. assert len(response) == 1, response
  213. self._log_chip_status_byte(response[0])
  214. def _write_burst(
  215. self,
  216. start_register: typing.Union[
  217. ConfigurationRegisterAddress, PatableAddress, FIFORegisterAddress
  218. ],
  219. values: typing.List[int],
  220. ) -> None:
  221. _LOGGER.debug(
  222. "writing burst: start_register=0x%02x values=%s", start_register, values
  223. )
  224. response = self._spi.xfer([start_register | self._WRITE_BURST] + values)
  225. assert len(response) == len(values) + 1, response
  226. self._log_chip_status_byte(response[0])
  227. assert all(v == response[0] for v in response[1:]), response
  228. def _reset(self) -> None:
  229. self._command_strobe(StrobeAddress.SRES)
  230. @classmethod
  231. def _filter_bandwidth_floating_point_to_real(
  232. cls, mantissa: int, exponent: int
  233. ) -> float:
  234. """
  235. See "13 Receiver Channel Filter Bandwidth"
  236. """
  237. return cls._CRYSTAL_OSCILLATOR_FREQUENCY_HERTZ / (
  238. 8 * (4 + mantissa) * (2 ** exponent)
  239. )
  240. def _get_filter_bandwidth_hertz(self) -> float:
  241. """
  242. MDMCFG4.CHANBW_E & MDMCFG4.CHANBW_M
  243. > [...] decimation ratio for the delta-sigma ADC input stream
  244. > and thus the channel bandwidth.
  245. See "13 Receiver Channel Filter Bandwidth"
  246. """
  247. mdmcfg4 = self._read_single_byte(ConfigurationRegisterAddress.MDMCFG4)
  248. return self._filter_bandwidth_floating_point_to_real(
  249. exponent=mdmcfg4 >> 6, mantissa=(mdmcfg4 >> 4) & 0b11
  250. )
  251. def _set_filter_bandwidth(self, *, mantissa: int, exponent: int) -> None:
  252. """
  253. MDMCFG4.CHANBW_E & MDMCFG4.CHANBW_M
  254. """
  255. mdmcfg4 = self._read_single_byte(ConfigurationRegisterAddress.MDMCFG4)
  256. mdmcfg4 &= 0b00001111
  257. assert 0 <= exponent <= 0b11, exponent
  258. mdmcfg4 |= exponent << 6
  259. assert 0 <= mantissa <= 0b11, mantissa
  260. mdmcfg4 |= mantissa << 4
  261. self._write_burst(
  262. start_register=ConfigurationRegisterAddress.MDMCFG4, values=[mdmcfg4]
  263. )
  264. def _get_symbol_rate_exponent(self) -> int:
  265. """
  266. MDMCFG4.DRATE_E
  267. """
  268. return self._read_single_byte(ConfigurationRegisterAddress.MDMCFG4) & 0b00001111
  269. def _set_symbol_rate_exponent(self, exponent: int):
  270. mdmcfg4 = self._read_single_byte(ConfigurationRegisterAddress.MDMCFG4)
  271. mdmcfg4 &= 0b11110000
  272. mdmcfg4 |= exponent
  273. self._write_burst(
  274. start_register=ConfigurationRegisterAddress.MDMCFG4, values=[mdmcfg4]
  275. )
  276. def _get_symbol_rate_mantissa(self) -> int:
  277. """
  278. MDMCFG3.DRATE_M
  279. """
  280. return self._read_single_byte(ConfigurationRegisterAddress.MDMCFG3)
  281. def _set_symbol_rate_mantissa(self, mantissa: int) -> None:
  282. self._write_burst(
  283. start_register=ConfigurationRegisterAddress.MDMCFG3, values=[mantissa]
  284. )
  285. @classmethod
  286. def _symbol_rate_floating_point_to_real(cls, mantissa: int, exponent: int) -> float:
  287. # see "12 Data Rate Programming"
  288. return (
  289. (256 + mantissa)
  290. * (2 ** exponent)
  291. * cls._CRYSTAL_OSCILLATOR_FREQUENCY_HERTZ
  292. / (2 ** 28)
  293. )
  294. @classmethod
  295. def _symbol_rate_real_to_floating_point(cls, real: float) -> typing.Tuple[int, int]:
  296. # see "12 Data Rate Programming"
  297. assert real > 0, real
  298. exponent = math.floor(
  299. math.log2(real / cls._CRYSTAL_OSCILLATOR_FREQUENCY_HERTZ) + 20
  300. )
  301. mantissa = round(
  302. real * 2 ** 28 / cls._CRYSTAL_OSCILLATOR_FREQUENCY_HERTZ / 2 ** exponent
  303. - 256
  304. )
  305. if mantissa == 256:
  306. exponent += 1
  307. mantissa = 0
  308. assert 0 < exponent <= 2 ** 4, exponent
  309. assert mantissa <= 2 ** 8, mantissa
  310. return mantissa, exponent
  311. def get_symbol_rate_baud(self) -> float:
  312. return self._symbol_rate_floating_point_to_real(
  313. mantissa=self._get_symbol_rate_mantissa(),
  314. exponent=self._get_symbol_rate_exponent(),
  315. )
  316. def set_symbol_rate_baud(self, real: float) -> None:
  317. # > The data rate can be set from 0.6 kBaud to 500 kBaud [...]
  318. mantissa, exponent = self._symbol_rate_real_to_floating_point(real)
  319. self._set_symbol_rate_mantissa(mantissa)
  320. self._set_symbol_rate_exponent(exponent)
  321. def get_modulation_format(self) -> ModulationFormat:
  322. mdmcfg2 = self._read_single_byte(ConfigurationRegisterAddress.MDMCFG2)
  323. return ModulationFormat((mdmcfg2 >> 4) & 0b111)
  324. def _set_modulation_format(self, modulation_format: ModulationFormat) -> None:
  325. mdmcfg2 = self._read_single_byte(ConfigurationRegisterAddress.MDMCFG2)
  326. mdmcfg2 &= 0b10001111
  327. mdmcfg2 |= modulation_format << 4
  328. self._write_burst(ConfigurationRegisterAddress.MDMCFG2, [mdmcfg2])
  329. def enable_manchester_code(self) -> None:
  330. """
  331. MDMCFG2.MANCHESTER_EN
  332. Enable manchester encoding & decoding for the entire packet,
  333. including the preamble and synchronization word.
  334. """
  335. mdmcfg2 = self._read_single_byte(ConfigurationRegisterAddress.MDMCFG2)
  336. mdmcfg2 |= 0b1000
  337. self._write_burst(ConfigurationRegisterAddress.MDMCFG2, [mdmcfg2])
  338. def get_sync_mode(self) -> SyncMode:
  339. mdmcfg2 = self._read_single_byte(ConfigurationRegisterAddress.MDMCFG2)
  340. return SyncMode(mdmcfg2 & 0b11)
  341. def set_sync_mode(
  342. self,
  343. mode: SyncMode,
  344. *,
  345. _carrier_sense_threshold_enabled: typing.Optional[bool] = None # unstable
  346. ) -> None:
  347. """
  348. MDMCFG2.SYNC_MODE
  349. see "14.3 Byte Synchronization"
  350. Carrier Sense (CS) Threshold (when receiving packets, API unstable):
  351. > Carrier sense can be used as a sync word qualifier
  352. > that requires the signal level to be higher than the threshold
  353. > for a sync word > search to be performed [...]
  354. > CS can be used to avoid interference from other RF sources [...]
  355. True: enable, False: disable, None: keep current setting
  356. See "17.4 Carrier Sense (CS)"
  357. """
  358. mdmcfg2 = self._read_single_byte(ConfigurationRegisterAddress.MDMCFG2)
  359. mdmcfg2 &= 0b11111100
  360. mdmcfg2 |= mode
  361. if _carrier_sense_threshold_enabled is not None:
  362. if _carrier_sense_threshold_enabled:
  363. mdmcfg2 |= 0b00000100
  364. else:
  365. mdmcfg2 &= 0b11111011
  366. self._write_burst(ConfigurationRegisterAddress.MDMCFG2, [mdmcfg2])
  367. def get_preamble_length_bytes(self) -> int:
  368. """
  369. MDMCFG1.NUM_PREAMBLE
  370. Minimum number of preamble bytes to be transmitted.
  371. See "15.2 Packet Format"
  372. """
  373. index = (
  374. self._read_single_byte(ConfigurationRegisterAddress.MDMCFG1) >> 4
  375. ) & 0b111
  376. return 2 ** (index >> 1) * (2 + (index & 0b1))
  377. def _set_preamble_length_index(self, index: int) -> None:
  378. assert 0 <= index <= 0b111
  379. mdmcfg1 = self._read_single_byte(ConfigurationRegisterAddress.MDMCFG1)
  380. mdmcfg1 &= 0b10001111
  381. mdmcfg1 |= index << 4
  382. self._write_burst(ConfigurationRegisterAddress.MDMCFG1, [mdmcfg1])
  383. def set_preamble_length_bytes(self, length: int) -> None:
  384. """
  385. see .get_preamble_length_bytes()
  386. """
  387. if length < 1:
  388. raise ValueError(
  389. "invalid preamble length {} given".format(length)
  390. + "\ncall .set_sync_mode(cc1101.SyncMode.NO_PREAMBLE_AND_SYNC_WORD)"
  391. + " to disable preamble"
  392. )
  393. if length % 3 == 0:
  394. index = math.log2(length / 3) * 2 + 1
  395. else:
  396. index = math.log2(length / 2) * 2
  397. if not index.is_integer() or index < 0 or index > 0b111:
  398. raise ValueError(
  399. "unsupported preamble length: {} bytes".format(length)
  400. + "\nsee MDMCFG1.NUM_PREAMBLE in cc1101 docs"
  401. )
  402. self._set_preamble_length_index(int(index))
  403. def _get_power_amplifier_setting_index(self) -> int:
  404. """
  405. see ._set_power_amplifier_setting_index
  406. """
  407. return self._read_single_byte(ConfigurationRegisterAddress.FREND0) & 0b111
  408. def _set_power_amplifier_setting_index(self, setting_index: int) -> None:
  409. """
  410. FREND0.PA_POWER
  411. > This value is an index to the PATABLE,
  412. > which can be programmed with up to 8 different PA settings.
  413. > In OOK/ASK mode, this selects the PATABLE index to use
  414. > when transmitting a '1'.
  415. > PATABLE index zero is used in OOK/ASK when transmitting a '0'.
  416. > The PATABLE settings from index 0 to the PA_POWER value are
  417. > used for > ASK TX shaping, [...]
  418. see "Figure 32: Shaping of ASK Signal"
  419. > If OOK modulation is used, the logic 0 and logic 1 power levels
  420. > shall be programmed to index 0 and 1 respectively.
  421. """
  422. assert 0 <= setting_index <= 0b111, setting_index
  423. frend0 = self._read_single_byte(ConfigurationRegisterAddress.FREND0)
  424. frend0 &= 0b11111000
  425. frend0 |= setting_index
  426. self._write_burst(ConfigurationRegisterAddress.FREND0, [frend0])
  427. def _verify_chip(self) -> None:
  428. partnum = self._read_status_register(StatusRegisterAddress.PARTNUM)
  429. if partnum != self._SUPPORTED_PARTNUM:
  430. raise ValueError(
  431. "unexpected chip part number {} (expected: {})".format(
  432. partnum, self._SUPPORTED_PARTNUM
  433. )
  434. )
  435. version = self._read_status_register(StatusRegisterAddress.VERSION)
  436. if version not in self._SUPPORTED_VERSIONS:
  437. raise ValueError(
  438. "unsupported chip version 0x{:02x} (expected one of [{}])".format(
  439. version,
  440. ", ".join("0x{:02x}".format(v) for v in self._SUPPORTED_VERSIONS),
  441. )
  442. )
  443. def _configure_defaults(self) -> None:
  444. # next major/breaking release will probably stick closer to CC1101's defaults
  445. # 6:4 MOD_FORMAT: OOK (default: 2-FSK)
  446. self._set_modulation_format(ModulationFormat.ASK_OOK)
  447. self._set_power_amplifier_setting_index(1)
  448. self._disable_data_whitening()
  449. # 7:6 unused
  450. # 5:4 FS_AUTOCAL: calibrate when going from IDLE to RX or TX
  451. # 3:2 PO_TIMEOUT: default
  452. # 1 PIN_CTRL_EN: default
  453. # 0 XOSC_FORCE_ON: default
  454. self._write_burst(ConfigurationRegisterAddress.MCSM0, [0b010100])
  455. def __enter__(self) -> "CC1101":
  456. # https://docs.python.org/3/reference/datamodel.html#object.__enter__
  457. try:
  458. self._spi.open(self._spi_bus, self._spi_chip_select)
  459. except PermissionError as exc:
  460. raise PermissionError(
  461. "Could not access {}".format(self._spi_device_path)
  462. + "\nVerify that the current user has both read and write access."
  463. + "\nOn some devices, like Raspberry Pis,"
  464. + "\n\tsudo usermod -a -G spi $USER"
  465. + "\nfollowed by a re-login grants sufficient permissions."
  466. ) from exc
  467. if self._lock_spi_device:
  468. # advisory, exclusive, non-blocking
  469. # lock removed in __exit__ by SpiDev.close()
  470. fcntl.flock(self._spi.fileno(), fcntl.LOCK_EX | fcntl.LOCK_NB)
  471. self._spi.max_speed_hz = 55700 # empirical
  472. self._reset()
  473. self._verify_chip()
  474. self._configure_defaults()
  475. marcstate = self.get_main_radio_control_state_machine_state()
  476. if marcstate != MainRadioControlStateMachineState.IDLE:
  477. raise ValueError(
  478. "expected marcstate idle (actual: {})".format(marcstate.name)
  479. )
  480. return self
  481. def __exit__(self, exc_type, exc_value, traceback): # -> typing.Literal[False]
  482. # https://docs.python.org/3/reference/datamodel.html#object.__exit__
  483. self._spi.close()
  484. return False
  485. def unlock_spi_device(self) -> None:
  486. """
  487. Manually release the lock set on the SPI device file.
  488. Alternatively, the lock will be released automatically,
  489. when leaving the context.
  490. Method fails silently, if the SPI device file is not locked.
  491. >>> transceiver = cc1101.CC1101(lock_spi_device=True)
  492. >>> # not locked
  493. >>> with transceiver:
  494. >>> # locked
  495. >>> # lock removed
  496. >>> with transceiver:
  497. >>> # locked
  498. >>> transceiver.unlock_spi_device()
  499. >>> # lock removed
  500. """
  501. fileno = self._spi.fileno()
  502. if fileno != -1:
  503. fcntl.flock(fileno, fcntl.LOCK_UN)
  504. def get_main_radio_control_state_machine_state(
  505. self,
  506. ) -> MainRadioControlStateMachineState:
  507. return MainRadioControlStateMachineState(
  508. self._read_status_register(StatusRegisterAddress.MARCSTATE)
  509. )
  510. def get_marc_state(self) -> MainRadioControlStateMachineState:
  511. """
  512. alias for get_main_radio_control_state_machine_state()
  513. """
  514. return self.get_main_radio_control_state_machine_state()
  515. @classmethod
  516. def _frequency_control_word_to_hertz(cls, control_word: typing.List[int]) -> float:
  517. return (
  518. int.from_bytes(control_word, byteorder="big", signed=False)
  519. * cls._FREQUENCY_CONTROL_WORD_HERTZ_FACTOR
  520. )
  521. @classmethod
  522. def _hertz_to_frequency_control_word(cls, hertz: float) -> typing.List[int]:
  523. return list(
  524. round(hertz / cls._FREQUENCY_CONTROL_WORD_HERTZ_FACTOR).to_bytes(
  525. length=3, byteorder="big", signed=False
  526. )
  527. )
  528. def _get_base_frequency_control_word(self) -> typing.List[int]:
  529. # > The base or start frequency is set by the 24 bitfrequency
  530. # > word located in the FREQ2, FREQ1, FREQ0 registers.
  531. return self._read_burst(
  532. start_register=ConfigurationRegisterAddress.FREQ2, length=3
  533. )
  534. def _set_base_frequency_control_word(self, control_word: typing.List[int]) -> None:
  535. self._write_burst(
  536. start_register=ConfigurationRegisterAddress.FREQ2, values=control_word
  537. )
  538. def get_base_frequency_hertz(self) -> float:
  539. return self._frequency_control_word_to_hertz(
  540. self._get_base_frequency_control_word()
  541. )
  542. def set_base_frequency_hertz(self, freq: float) -> None:
  543. if freq < (self._TRANSMIT_MIN_FREQUENCY_HERTZ - 50e3):
  544. # > [use] warnings.warn() in library code if the issue is avoidable
  545. # > and the client application should be modified to eliminate the warning[.]
  546. # > [use] logging.warning() if there is nothing the client application
  547. # > can do about the situation, but the event should still be noted.
  548. # https://docs.python.org/3/howto/logging.html#when-to-use-logging
  549. warnings.warn(
  550. "CC1101 is unable to transmit at frequencies below {:.1f} MHz".format(
  551. self._TRANSMIT_MIN_FREQUENCY_HERTZ / 1e6
  552. )
  553. )
  554. self._set_base_frequency_control_word(
  555. self._hertz_to_frequency_control_word(freq)
  556. )
  557. def __str__(self) -> str:
  558. sync_mode = self.get_sync_mode()
  559. output_power_settings_hex = tuple(map("0x{:x}".format, self.get_output_power()))
  560. attrs = (
  561. "marcstate={}".format(
  562. self.get_main_radio_control_state_machine_state().name.lower()
  563. ),
  564. "base_frequency={:.2f}MHz".format(
  565. self.get_base_frequency_hertz() / 10 ** 6
  566. ),
  567. "symbol_rate={:.2f}kBaud".format(self.get_symbol_rate_baud() / 1000),
  568. "modulation_format={}".format(self.get_modulation_format().name),
  569. "sync_mode={}".format(sync_mode.name),
  570. "preamble_length={}B".format(self.get_preamble_length_bytes())
  571. if sync_mode != SyncMode.NO_PREAMBLE_AND_SYNC_WORD
  572. else None,
  573. "sync_word=0x{:02x}{:02x}".format(*self.get_sync_word())
  574. if sync_mode != SyncMode.NO_PREAMBLE_AND_SYNC_WORD
  575. else None,
  576. "packet_length{}{}B".format(
  577. "≤"
  578. if self.get_packet_length_mode() == PacketLengthMode.VARIABLE
  579. else "=",
  580. self.get_packet_length_bytes(),
  581. ),
  582. "output_power=({})".format(
  583. ",".join(output_power_settings_hex)
  584. if len(output_power_settings_hex) > 1
  585. else output_power_settings_hex[0] + ","
  586. ),
  587. )
  588. return "CC1101({})".format(", ".join(filter(None, attrs)))
  589. def get_configuration_register_values(
  590. self,
  591. start_register: ConfigurationRegisterAddress = min(
  592. ConfigurationRegisterAddress
  593. ),
  594. end_register: ConfigurationRegisterAddress = max(ConfigurationRegisterAddress),
  595. ) -> typing.Dict[ConfigurationRegisterAddress, int]:
  596. assert start_register <= end_register, (start_register, end_register)
  597. values = self._read_burst(
  598. start_register=start_register, length=end_register - start_register + 1
  599. )
  600. return {
  601. ConfigurationRegisterAddress(start_register + i): v
  602. for i, v in enumerate(values)
  603. }
  604. def get_sync_word(self) -> bytes:
  605. """
  606. SYNC1 & SYNC0
  607. See "15.2 Packet Format"
  608. The first byte's most significant bit is transmitted first.
  609. """
  610. return bytes(
  611. self._read_burst(
  612. start_register=ConfigurationRegisterAddress.SYNC1, length=2
  613. )
  614. )
  615. def set_sync_word(self, sync_word: bytes) -> None:
  616. """
  617. See .set_sync_word()
  618. """
  619. if len(sync_word) != 2:
  620. raise ValueError("expected two bytes, got {!r}".format(sync_word))
  621. self._write_burst(
  622. start_register=ConfigurationRegisterAddress.SYNC1, values=list(sync_word)
  623. )
  624. def get_packet_length_bytes(self) -> int:
  625. """
  626. PKTLEN
  627. Packet length in fixed packet length mode,
  628. maximum packet length in variable packet length mode.
  629. > In variable packet length mode, [...]
  630. > any packet received with a length byte
  631. > with a value greater than PKTLEN will be discarded.
  632. """
  633. return self._read_single_byte(ConfigurationRegisterAddress.PKTLEN)
  634. def set_packet_length_bytes(self, packet_length: int) -> None:
  635. """
  636. see get_packet_length_bytes()
  637. """
  638. assert 1 <= packet_length <= 255, "unsupported packet length {}".format(
  639. packet_length
  640. )
  641. self._write_burst(
  642. start_register=ConfigurationRegisterAddress.PKTLEN, values=[packet_length]
  643. )
  644. def _disable_data_whitening(self):
  645. """
  646. PKTCTRL0.WHITE_DATA
  647. see "15.1 Data Whitening"
  648. > By setting PKTCTRL0.WHITE_DATA=1 [default],
  649. > all data, except the preamble and the sync word
  650. > will be XOR-ed with a 9-bit pseudo-random (PN9)
  651. > sequence before being transmitted.
  652. """
  653. pktctrl0 = self._read_single_byte(ConfigurationRegisterAddress.PKTCTRL0)
  654. pktctrl0 &= 0b10111111
  655. self._write_burst(
  656. start_register=ConfigurationRegisterAddress.PKTCTRL0, values=[pktctrl0]
  657. )
  658. def disable_checksum(self) -> None:
  659. """
  660. PKTCTRL0.CRC_EN
  661. Disable automatic 2-byte cyclic redundancy check (CRC) sum
  662. appending in TX mode and checking in RX mode.
  663. See "Figure 19: Packet Format".
  664. """
  665. pktctrl0 = self._read_single_byte(ConfigurationRegisterAddress.PKTCTRL0)
  666. pktctrl0 &= 0b11111011
  667. self._write_burst(
  668. start_register=ConfigurationRegisterAddress.PKTCTRL0, values=[pktctrl0]
  669. )
  670. def _get_transceive_mode(self) -> _TransceiveMode:
  671. pktctrl0 = self._read_single_byte(ConfigurationRegisterAddress.PKTCTRL0)
  672. return _TransceiveMode((pktctrl0 >> 4) & 0b11)
  673. def _set_transceive_mode(self, mode: _TransceiveMode) -> None:
  674. _LOGGER.info("changing transceive mode to %s", mode.name)
  675. pktctrl0 = self._read_single_byte(ConfigurationRegisterAddress.PKTCTRL0)
  676. pktctrl0 &= ~0b00110000
  677. pktctrl0 |= mode << 4
  678. self._write_burst(
  679. start_register=ConfigurationRegisterAddress.PKTCTRL0, values=[pktctrl0]
  680. )
  681. def get_packet_length_mode(self) -> PacketLengthMode:
  682. pktctrl0 = self._read_single_byte(ConfigurationRegisterAddress.PKTCTRL0)
  683. return PacketLengthMode(pktctrl0 & 0b11)
  684. def set_packet_length_mode(self, mode: PacketLengthMode) -> None:
  685. pktctrl0 = self._read_single_byte(ConfigurationRegisterAddress.PKTCTRL0)
  686. pktctrl0 &= 0b11111100
  687. pktctrl0 |= mode
  688. self._write_burst(
  689. start_register=ConfigurationRegisterAddress.PKTCTRL0, values=[pktctrl0]
  690. )
  691. def _get_patable(self) -> typing.Tuple[int, ...]:
  692. """
  693. see "10.6 PATABLE Access" and "24 Output Power Programming"
  694. default: (0xC6, 0, 0, 0, 0, 0, 0, 0)
  695. """
  696. return tuple(
  697. self._read_burst(
  698. start_register=PatableAddress.PATABLE, length=self._PATABLE_LENGTH_BYTES
  699. )
  700. )
  701. def _set_patable(self, settings: typing.Iterable[int]):
  702. settings = list(settings)
  703. assert all(0 <= l <= 0xFF for l in settings), settings
  704. assert 0 < len(settings) <= self._PATABLE_LENGTH_BYTES, settings
  705. self._write_burst(start_register=PatableAddress.PATABLE, values=settings)
  706. def get_output_power(self) -> typing.Tuple[int, ...]:
  707. """
  708. Returns the enabled output power settings
  709. (up to 8 bytes of the PATABLE register).
  710. see .set_output_power()
  711. """
  712. return self._get_patable()[: self._get_power_amplifier_setting_index() + 1]
  713. def set_output_power(self, power_settings: typing.Iterable[int]) -> None:
  714. """
  715. Configures output power levels by setting PATABLE and FREND0.PA_POWER.
  716. Up to 8 bytes may be provided.
  717. > [PATABLE] provides flexible PA power ramp up and ramp down
  718. > at the start and end of transmission when using 2-FSK, GFSK,
  719. > 4-FSK, and MSK modulation as well as ASK modulation shaping.
  720. For OOK modulation, exactly 2 bytes must be provided:
  721. 0 to turn off the transmission for logical 0,
  722. and a level > 0 to turn on the transmission for logical 1.
  723. >>> transceiver.set_output_power((0, 0xC6))
  724. See "Table 39: Optimum PATABLE Settings for Various Output Power Levels [...]"
  725. and section "24 Output Power Programming".
  726. """
  727. power_settings = list(power_settings)
  728. # checks in sub-methods
  729. self._set_power_amplifier_setting_index(len(power_settings) - 1)
  730. self._set_patable(power_settings)
  731. def _flush_tx_fifo_buffer(self) -> None:
  732. # > Only issue SFTX in IDLE or TXFIFO_UNDERFLOW states.
  733. _LOGGER.debug("flushing tx fifo buffer")
  734. self._command_strobe(StrobeAddress.SFTX)
  735. def transmit(self, payload: bytes) -> None:
  736. """
  737. The most significant bit is transmitted first.
  738. In variable packet length mode,
  739. a byte indicating the packet's length will be prepended.
  740. > In variable packet length mode,
  741. > the packet length is configured by the first byte [...].
  742. > The packet length is defined as the payload data,
  743. > excluding the length byte and the optional CRC.
  744. from "15.2 Packet Format"
  745. Call .set_packet_length_mode(cc1101.PacketLengthMode.FIXED)
  746. to switch to fixed packet length mode.
  747. """
  748. # see "15.2 Packet Format"
  749. # > In variable packet length mode, [...]
  750. # > The first byte written to the TXFIFO must be different from 0.
  751. packet_length_mode = self.get_packet_length_mode()
  752. packet_length = self.get_packet_length_bytes()
  753. if packet_length_mode == PacketLengthMode.VARIABLE:
  754. if not payload:
  755. raise ValueError("empty payload {!r}".format(payload))
  756. if len(payload) > packet_length:
  757. raise ValueError(
  758. "payload exceeds maximum payload length of {} bytes".format(
  759. packet_length
  760. )
  761. + "\nsee .get_packet_length_bytes()"
  762. + "\npayload: {!r}".format(payload)
  763. )
  764. payload = int.to_bytes(len(payload), length=1, byteorder="big") + payload
  765. elif (
  766. packet_length_mode == PacketLengthMode.FIXED
  767. and len(payload) != packet_length
  768. ):
  769. raise ValueError(
  770. "expected payload length of {} bytes, got {}".format(
  771. packet_length, len(payload)
  772. )
  773. + "\nsee .set_packet_length_mode() and .get_packet_length_bytes()"
  774. + "\npayload: {!r}".format(payload)
  775. )
  776. marcstate = self.get_main_radio_control_state_machine_state()
  777. if marcstate != MainRadioControlStateMachineState.IDLE:
  778. raise Exception(
  779. "device must be idle before transmission (current marcstate: {})".format(
  780. marcstate.name
  781. )
  782. )
  783. self._flush_tx_fifo_buffer()
  784. self._write_burst(FIFORegisterAddress.TX, list(payload))
  785. _LOGGER.info(
  786. "transmitting 0x%s (%r)",
  787. "".join("{:02x}".format(b) for b in payload),
  788. payload,
  789. )
  790. self._command_strobe(StrobeAddress.STX)
  791. @contextlib.contextmanager
  792. def asynchronous_transmission(self) -> typing.Iterator[Pin]:
  793. """
  794. > [...] the GDO0 pin is used for data input [...]
  795. > The CC1101 modulator samples the level of the asynchronous input
  796. > 8 times faster than the programmed data rate.
  797. see "27.1 Asynchronous Serial Operation"
  798. >>> with cc1101.CC1101() as transceiver:
  799. >>> transceiver.set_base_frequency_hertz(433.92e6)
  800. >>> transceiver.set_symbol_rate_baud(600)
  801. >>> print(transceiver)
  802. >>> with transceiver.asynchronous_transmission():
  803. >>> # send digital signal to GDO0 pin
  804. """
  805. self._set_transceive_mode(_TransceiveMode.ASYNCHRONOUS_SERIAL)
  806. self._command_strobe(StrobeAddress.STX)
  807. try:
  808. # > In TX, the GDO0 pin is used for data input (TX data).
  809. yield Pin.GDO0
  810. finally:
  811. self._command_strobe(StrobeAddress.SIDLE)
  812. self._set_transceive_mode(_TransceiveMode.FIFO)
  813. def _enable_receive_mode(self) -> None: # unstable
  814. self._command_strobe(StrobeAddress.SRX)
  815. def _get_received_packet(self) -> typing.Optional[_ReceivedPacket]: # unstable
  816. """
  817. see section "20 Data FIFO"
  818. """
  819. rxbytes = self._read_status_register(StatusRegisterAddress.RXBYTES)
  820. # PKTCTRL1.APPEND_STATUS is enabled by default
  821. if rxbytes < 2:
  822. return None
  823. buffer = self._read_burst(start_register=FIFORegisterAddress.RX, length=rxbytes)
  824. return _ReceivedPacket(
  825. payload=bytes(buffer[:-2]),
  826. rssi_index=buffer[-2],
  827. checksum_valid=bool(buffer[-1] >> 7),
  828. link_quality_indicator=buffer[-1] & 0b0111111,
  829. )