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@@ -489,6 +489,7 @@ class CC1101:
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> If OOK modulation is used, the logic 0 and logic 1 power levels
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> If OOK modulation is used, the logic 0 and logic 1 power levels
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> shall be programmed to index 0 and 1 respectively.
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> shall be programmed to index 0 and 1 respectively.
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"""
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"""
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+ assert 0 <= setting_index <= 0b111, setting_index
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frend0 = self._read_single_byte(ConfigurationRegisterAddress.FREND0)
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frend0 = self._read_single_byte(ConfigurationRegisterAddress.FREND0)
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frend0 &= 0b11111000
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frend0 &= 0b11111000
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frend0 |= setting_index
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frend0 |= setting_index
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@@ -642,6 +643,9 @@ class CC1101:
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def __str__(self) -> str:
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def __str__(self) -> str:
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sync_mode = self.get_sync_mode()
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sync_mode = self.get_sync_mode()
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+ output_power_levels_hex = tuple(
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+ map("0x{:x}".format, self.get_output_power_levels())
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+ )
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attrs = (
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attrs = (
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"marcstate={}".format(
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"marcstate={}".format(
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self.get_main_radio_control_state_machine_state().name.lower()
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self.get_main_radio_control_state_machine_state().name.lower()
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@@ -665,7 +669,9 @@ class CC1101:
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self.get_packet_length_bytes(),
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self.get_packet_length_bytes(),
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),
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),
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"output_power_levels=({})".format(
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"output_power_levels=({})".format(
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- "".join(map("0x{:X},".format, self.get_output_power_levels()))
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+ ",".join(output_power_levels_hex)
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+ if len(output_power_levels_hex) > 1
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+ else output_power_levels_hex[0] + ","
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),
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),
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)
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)
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return "CC1101({})".format(", ".join(filter(None, attrs)))
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return "CC1101({})".format(", ".join(filter(None, attrs)))
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@@ -803,22 +809,42 @@ class CC1101:
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)
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)
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)
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)
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- def _set_patable(self, setting: typing.Iterable[int]):
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+ def _set_patable(self, levels: typing.Iterable[int]):
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- setting = list(setting)
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+ levels = list(levels)
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- assert 0 < len(setting) <= self._PATABLE_LENGTH_BYTES, setting
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+ assert all(0 <= l <= 0xFF for l in levels), levels
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- self._write_burst(start_register=PatableAddress.PATABLE, values=setting)
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+ assert 0 < len(levels) <= self._PATABLE_LENGTH_BYTES, levels
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+ self._write_burst(start_register=PatableAddress.PATABLE, values=levels)
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def get_output_power_levels(self) -> typing.Tuple[int, ...]:
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def get_output_power_levels(self) -> typing.Tuple[int, ...]:
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"""
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"""
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- Returns the enabled PATABLE output power levels (up to 8 bytes).
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+ Returns the enabled output power levels
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+ (up to 8 bytes of the PATABLE register).
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+
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+ see .set_output_power_levels()
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+ """
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+ return self._get_patable()[: self._get_power_amplifier_setting_index() + 1]
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+
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+ def set_output_power_levels(self, power_levels: typing.Iterable[int]) -> None:
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+ """
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+ Configures output power levels by setting PATABLE and FREND0.PA_POWER.
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+ Up to 8 bytes may be provided.
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> [PATABLE] provides flexible PA power ramp up and ramp down
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> [PATABLE] provides flexible PA power ramp up and ramp down
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> at the start and end of transmission when using 2-FSK, GFSK,
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> at the start and end of transmission when using 2-FSK, GFSK,
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> 4-FSK, and MSK modulation as well as ASK modulation shaping.
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> 4-FSK, and MSK modulation as well as ASK modulation shaping.
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- See "24 Output Power Programming"
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+ For OOK modulation, exactly 2 bytes must be provided:
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+ 0 to turn off the transmission for logical 0,
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+ and a level > 0 to turn on the transmission for logical 1.
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+ >>> transceiver.set_output_power_levels((0, 0xC6))
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+
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+ See "Table 39: Optimum PATABLE Settings for Various Output Power Levels [...]"
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+ and section "24 Output Power Programming".
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"""
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"""
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- return self._get_patable()[: self._get_power_amplifier_setting_index() + 1]
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+ power_levels = list(power_levels)
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+
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+ self._set_power_amplifier_setting_index(len(power_levels) - 1)
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+ self._set_patable(power_levels)
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def _flush_tx_fifo_buffer(self) -> None:
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def _flush_tx_fifo_buffer(self) -> None:
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